Scipediacontent: Scipediacontent moved page Draft Content 488742696 to Laurent et al 2019a

2021-02-01T20:42:16Z

Scipediacontent moved page Draft Content 488742696 to Laurent et al 2019a

Scipediacontent: Created page with " == Abstract == To protect against hardware fault attacks, developers can use software countermeasures. They are generally designed to thwart software fault models such as in..."

2021-02-01T20:42:10Z

Created page with " == Abstract == To protect against hardware fault attacks, developers can use software countermeasures. They are generally designed to thwart software fault models such as in..."

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== Abstract ==

To protect against hardware fault attacks, developers can use software countermeasures. They are generally designed to thwart software fault models such as instruction skip or memory corruption. However, these typical models do not take into account the actual implementation of a processor. By analyzing the processor microarchitecture, it is possible to bypass typical software countermeasures. In this paper, we analyze the vulnerability of a secure code from FISSC (Fault Injection and Simulation Secure Collection), by simulating fault injections in a RISC-V Rocket processor RTL description. We highlight the importance of hidden registers in the processor pipeline, which temporarily hold data during code execution. Secret data can be leaked by attacking these hidden registers. Software countermeasures against such attacks are also proposed.

== Original document ==

The different versions of the original document can be found in:

* [https://hal.univ-grenoble-alpes.fr/hal-02426113 https://hal.univ-grenoble-alpes.fr/hal-02426113]

* [http://xplorestaging.ieee.org/ielx7/8704855/8714721/08715158.pdf?arnumber=8715158 http://xplorestaging.ieee.org/ielx7/8704855/8714721/08715158.pdf?arnumber=8715158],
: [http://dx.doi.org/10.23919/date.2019.8715158 http://dx.doi.org/10.23919/date.2019.8715158]

* [https://dblp.uni-trier.de/db/conf/date/date2019.html#LaurentBDP19 https://dblp.uni-trier.de/db/conf/date/date2019.html#LaurentBDP19],
: [https://doi.org/10.23919/DATE.2019.8715158 https://doi.org/10.23919/DATE.2019.8715158],
: [https://ieeexplore.ieee.org/document/8715158 https://ieeexplore.ieee.org/document/8715158],
: [http://doi.org/10.23919/DATE.2019.8715158 http://doi.org/10.23919/DATE.2019.8715158],
: [https://academic.microsoft.com/#/detail/2944835877 https://academic.microsoft.com/#/detail/2944835877]

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Laurent et al 2019a - Revision history

Scipediacontent: Scipediacontent moved page Draft Content 488742696 to Laurent et al 2019a

Scipediacontent: Created page with " == Abstract == To protect against hardware fault attacks, developers can use software countermeasures. They are generally designed to thwart software fault models such as in..."