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		<title>Kumar et al 2010b - Revision history</title>
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		<updated>2026-05-14T02:05:58Z</updated>
		<subtitle>Revision history for this page on the wiki</subtitle>
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		<id>http://www.colloquiam.com/wd/index.php?title=Kumar_et_al_2010b&amp;diff=201834&amp;oldid=prev</id>
		<title>Scipediacontent: Scipediacontent moved page Draft Content 114654210 to Kumar et al 2010b</title>
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				<updated>2021-02-02T04:29:53Z</updated>
		
		<summary type="html">&lt;p&gt;Scipediacontent moved page &lt;a href=&quot;/public/Draft_Content_114654210&quot; class=&quot;mw-redirect&quot; title=&quot;Draft Content 114654210&quot;&gt;Draft Content 114654210&lt;/a&gt; to &lt;a href=&quot;/public/Kumar_et_al_2010b&quot; title=&quot;Kumar et al 2010b&quot;&gt;Kumar et al 2010b&lt;/a&gt;&lt;/p&gt;
&lt;table class=&quot;diff diff-contentalign-left&quot; data-mw=&quot;interface&quot;&gt;
				&lt;tr style='vertical-align: top;' lang='en'&gt;
				&lt;td colspan='1' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='1' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 04:29, 2 February 2021&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan='2' style='text-align: center;' lang='en'&gt;&lt;div class=&quot;mw-diff-empty&quot;&gt;(No difference)&lt;/div&gt;
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		<author><name>Scipediacontent</name></author>	</entry>

	<entry>
		<id>http://www.colloquiam.com/wd/index.php?title=Kumar_et_al_2010b&amp;diff=201833&amp;oldid=prev</id>
		<title>Scipediacontent: Created page with &quot; == Abstract ==  Timing speculation has been proposed as a technique for maximizing the energy efficiency of processors with minimal loss in performance. A typical implementat...&quot;</title>
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				<updated>2021-02-02T04:29:48Z</updated>
		
		<summary type="html">&lt;p&gt;Created page with &amp;quot; == Abstract ==  Timing speculation has been proposed as a technique for maximizing the energy efficiency of processors with minimal loss in performance. A typical implementat...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;&lt;br /&gt;
== Abstract ==&lt;br /&gt;
&lt;br /&gt;
Timing speculation has been proposed as a technique for maximizing the energy efficiency of processors with minimal loss in performance. A typical implementation of timing speculation involves speculatively reducing the voltage of a processor to a point where errors are possible but rare, and employing an error recovery mechanism to ensure correct functionality. This allows significant energy savings with a small recovery overhead.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Original document ==&lt;br /&gt;
&lt;br /&gt;
The different versions of the original document can be found in:&lt;br /&gt;
&lt;br /&gt;
* [https://www.ideals.illinois.edu/bitstream/2142/16791/2/zea_nicolas.pdf https://www.ideals.illinois.edu/bitstream/2142/16791/2/zea_nicolas.pdf]&lt;br /&gt;
&lt;br /&gt;
* [http://xplorestaging.ieee.org/ielx5/5640356/5647518/05647702.pdf?arnumber=5647702 http://xplorestaging.ieee.org/ielx5/5640356/5647518/05647702.pdf?arnumber=5647702],&lt;br /&gt;
: [http://dx.doi.org/10.1109/iccd.2010.5647702 http://dx.doi.org/10.1109/iccd.2010.5647702]&lt;br /&gt;
&lt;br /&gt;
* [https://experts.umn.edu/en/publications/optimal-powerperformance-pipelining-for-error-resilient-processor https://experts.umn.edu/en/publications/optimal-powerperformance-pipelining-for-error-resilient-processor],&lt;br /&gt;
: [http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005647702 http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005647702],&lt;br /&gt;
: [https://www.ideals.illinois.edu/handle/2142/16791 https://www.ideals.illinois.edu/handle/2142/16791],&lt;br /&gt;
: [https://dblp.uni-trier.de/db/conf/iccd/iccd2010.html#ZeaSAK10 https://dblp.uni-trier.de/db/conf/iccd/iccd2010.html#ZeaSAK10],&lt;br /&gt;
: [https://experts.illinois.edu/en/publications/optimal-powerperformance-pipelining-for-error-resilient-processor https://experts.illinois.edu/en/publications/optimal-powerperformance-pipelining-for-error-resilient-processor],&lt;br /&gt;
: [http://www.ece.umn.edu/users/jsartori/papers/iccd10.pdf http://www.ece.umn.edu/users/jsartori/papers/iccd10.pdf],&lt;br /&gt;
: [https://www.ideals.illinois.edu/bitstream/2142/16791/2/zea_nicolas.pdf https://www.ideals.illinois.edu/bitstream/2142/16791/2/zea_nicolas.pdf],&lt;br /&gt;
: [https://academic.microsoft.com/#/detail/2061130129 https://academic.microsoft.com/#/detail/2061130129]&lt;/div&gt;</summary>
		<author><name>Scipediacontent</name></author>	</entry>

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