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		<title>Kinsy et al 2011a - Revision history</title>
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		<updated>2026-05-11T20:00:12Z</updated>
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		<title>Scipediacontent: Scipediacontent moved page Draft Content 902290824 to Kinsy et al 2011a</title>
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				<updated>2021-02-01T20:30:42Z</updated>
		
		<summary type="html">&lt;p&gt;Scipediacontent moved page &lt;a href=&quot;/public/Draft_Content_902290824&quot; class=&quot;mw-redirect&quot; title=&quot;Draft Content 902290824&quot;&gt;Draft Content 902290824&lt;/a&gt; to &lt;a href=&quot;/public/Kinsy_et_al_2011a&quot; title=&quot;Kinsy et al 2011a&quot;&gt;Kinsy et al 2011a&lt;/a&gt;&lt;/p&gt;
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				&lt;td colspan='1' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='1' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 20:30, 1 February 2021&lt;/td&gt;
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		<author><name>Scipediacontent</name></author>	</entry>

	<entry>
		<id>http://www.colloquiam.com/wd/index.php?title=Kinsy_et_al_2011a&amp;diff=197751&amp;oldid=prev</id>
		<title>Scipediacontent: Created page with &quot; == Abstract ==  In this paper we present the HAsim FPGA-accelerated simulator. HAsim is able to model a shared-memory multicore system including detailed core pipelines, cach...&quot;</title>
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				<updated>2021-02-01T20:30:37Z</updated>
		
		<summary type="html">&lt;p&gt;Created page with &amp;quot; == Abstract ==  In this paper we present the HAsim FPGA-accelerated simulator. HAsim is able to model a shared-memory multicore system including detailed core pipelines, cach...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;&lt;br /&gt;
== Abstract ==&lt;br /&gt;
&lt;br /&gt;
In this paper we present the HAsim FPGA-accelerated simulator. HAsim is able to model a shared-memory multicore system including detailed core pipelines, cache hierarchy, and on-chip network, using a single FPGA. We describe the scaling techniques that make this possible, including novel uses of time-multiplexing in the core pipeline and on-chip network. We compare our time-multiplexed approach to a direct implementation, and present a case study that motivates why high-detail simulations should continue to play a role in the architectural exploration process.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Original document ==&lt;br /&gt;
&lt;br /&gt;
The different versions of the original document can be found in:&lt;br /&gt;
&lt;br /&gt;
* [http://csg.csail.mit.edu/pubs/memos/Memo-505/memo505.pdf http://csg.csail.mit.edu/pubs/memos/Memo-505/memo505.pdf]&lt;br /&gt;
&lt;br /&gt;
* [http://xplorestaging.ieee.org/ielx5/5743111/5749710/05749747.pdf?arnumber=5749747 http://xplorestaging.ieee.org/ielx5/5743111/5749710/05749747.pdf?arnumber=5749747],&lt;br /&gt;
: [http://dx.doi.org/10.1109/hpca.2011.5749747 http://dx.doi.org/10.1109/hpca.2011.5749747]&lt;br /&gt;
&lt;br /&gt;
* [https://dblp.uni-trier.de/db/conf/hpca/hpca2011.html#PellauerAKPE11 https://dblp.uni-trier.de/db/conf/hpca/hpca2011.html#PellauerAKPE11],&lt;br /&gt;
: [https://ieeexplore.ieee.org/document/5749747 https://ieeexplore.ieee.org/document/5749747],&lt;br /&gt;
: [http://csg.csail.mit.edu/pubs/memos/Memo-505/memo505.pdf http://csg.csail.mit.edu/pubs/memos/Memo-505/memo505.pdf],&lt;br /&gt;
: [http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005749747 http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005749747],&lt;br /&gt;
: [http://ieeexplore.ieee.org/document/5749747 http://ieeexplore.ieee.org/document/5749747],&lt;br /&gt;
: [https://doi.org/10.1109/HPCA.2011.5749747 https://doi.org/10.1109/HPCA.2011.5749747],&lt;br /&gt;
: [https://academic.microsoft.com/#/detail/2137385009 https://academic.microsoft.com/#/detail/2137385009]&lt;/div&gt;</summary>
		<author><name>Scipediacontent</name></author>	</entry>

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